Rupa venkata Siva krishna

Rupa Venkata Siva Krishna has worked in various roles since 2009. From 2009 to 2014, they were a Project Coordinator at Andhra University. From 2014 to 2017, they were an FPGA RTL Design Engineer at Technosoft Solutions in Visakhapatnam. During 2017, they were a Sr. FPGA Design Engineer at TECHMEET and a Sr. RTL Design Engineer at HCL Technologies. From 2018 to 2019, they were a Lead Engineer at QuEST Global. Since 2020, they have been a Project Lead - Design at Mobiveil Inc.

Rupa Venkata Siva Krishna started their educational journey in 2001 when they obtained a Bachelor of Science in Electronics from Parvathaneni Brahmayya Siddhartha College of Arts & Science. They then went on to pursue a Master of Science in Instrumentation from Andhra University from 2005 to 2007. Following this, they attended Sathyabama University from 2007 to 2009. In June 2022, they obtained a certification in Fundamentals of IEEE 1801 Low-Power Specification Format v7.0 Exam from Cadence Design Systems.