RW

Ruomin Wang

Staff ASIC Engineer at Moffett.AI

Ruomin Wang has a diverse work experience spanning various roles and companies. Starting in 2008, they began their professional journey with a research internship at LEME. In 2009, they completed another research internship at LIP6-SoC-SYEL. In 2010, they undertook a research internship at LIP6-SoC-CIAN. During this time, they also worked as a Teaching Assistant at Ecole d'ingénieur Polytech’Paris – UPMC, where they taught Digital/Analogue Electronics and Computer Engineering, and gained experience in designing and implementing FPGA IPs with VHDL and constructing a semi-autonomous robot controlled by ARM7.

In the same year, Ruomin Wang also worked as a Research Assistant at UPMC - Sorbonne Universities, focusing on neural network applications, signal integrity, and heterogeneous system modeling. They were involved in designing a new method to model signal integrity performances using neural networks and implementing platforms for obtaining training data using Matlab Neural Network Toolbox.

In 2014, they joined Prodways Group as a Firmware Engineer, where they designed and implemented a loss-less image encoding/decoding algorithm for heterogeneous systems and developed firmware for the DLP control system using VHDL.

From 2018 to 2020, Ruomin Wang worked as a Senior FPGA Engineer at ZTE, specializing in 5G communications. They contributed to the design and optimization of new FPGA functionalities for Packet Transport Network (PTN) in 5G and implemented an FPGA-based solution to reduce latency in routing information updates.

In 2020, they joined Peng Cheng Laboratory as an FPGA Engineer, focusing on video codec.

Lastly, in 2021, they joined Moffett.AI as a Senior ASIC Design Engineer, taking on the role of a Staff ASIC Engineer in 2022.

Ruomin Wang's work experience showcases their expertise in FPGA design, firmware engineering, signal integrity, neural network applications, and teaching in various areas of electronics and computer engineering.

Ruomin Wang obtained a Bachelor's degree in Telecommunications Engineering from Sichuan University in the years 2004 to 2008. Following this, they pursued another Bachelor's degree in Electrical and Electronic Engineering at the University Paris-Ouest Nanterre La Défense from 2006 to 2008. Afterwards, Ruomin Wang completed a Master's degree in Electrical and Electronic Engineering at UPMC, Sorbonne Universités, from 2008 to 2010. They concluded their education with a Doctor of Philosophy (PhD) degree in Electrical and Electronic Engineering from UPMC, Sorbonne Universités, in the period of 2010 to 2014.

Links


Org chart

Timeline

  • Staff ASIC Engineer

    April, 2022 - present

  • Senior ASIC design engineer

    August, 2021