Arathy Menon has a total work experience of 10 years in the field of digital design and verification engineering. Arathy currently holds the position of Digital Design and Verification Engineer at Morse Micro since August 2020. Prior to this, they worked at Synopsys Inc for 8 years, starting as an ASIC Digital Design Engineer I in October 2012 and eventually becoming an ASIC Digital Design Engineer II in June 2014. During their time at Synopsys Inc, they were responsible for RTL design of USB 3.0 and SSIC IP, as well as the development of functional specifications, design implementation, verification, and release engineering aspects of USB/SSIC IPs. Arathy started their career at Wipro Technologies as a VLSI Engineer in January 2010 and worked there until October 2012.
Arathy Menon attended Amrita School of Engineering from 2005 to 2009. Arathy obtained a Bachelor's degree in Electronics and Communications Engineering during this period.
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