Jing-Chyi Liao

Principal Engineer at MStar Semiconductor

Jing-Chyi Liao is a seasoned engineer with a Ph.D. in Electrical Engineering from National Cheng Kung University. Currently serving as a Principal Engineer at MStar Semiconductor since April 2012, Jing-Chyi Liao specializes in foundry model QA, new model construction, device and chip-level reliability consulting, and IO circuit design. Prior experience includes a tenure at TSMC from 2009 to April 2012, where Jing-Chyi Liao conducted SRAM device analysis and process improvement as well as SRAM cell-level simulation. Additionally, a role as a Senior Engineer at AUO in early 2009 involved setting up reliability and electric test equipment and studying reliability mechanisms of TFT devices.

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MStar Semiconductor

MStar is a global leader in supplying application specific ICs (ASIC) for the consumer and communication product markets. MStar has successfully built a diverse product portfolio that propels the company to become one of the fastest growing in the industry since its inception, with worldwide leadership position in the LCD monitor controller, analog and digital TV, cellular and mobile communications and portable devices.


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1,001-5,000

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