NanoXplore SAS
Benoit Leconte is an experienced engineer specializing in research and development, currently employed at NanoXplore SAS since January 2019. Previously, from October 2011 to December 2018, Benoit served as a front end designer engineer at Bull, where responsibilities included designing test architectures, specifying test modes, evaluating clock gating impacts, and supporting various development teams on DFT aspects. Benoit has expertise in SystemVerilog coding rules, synthesis flow development, memory macro sizing, and automation of design regression tasks. Benoit contributed to the SNUG convention in 2016 by writing and presenting a paper on DFTMAX Shared IO for ASICs. Benoit holds a Master’s degree in Electronic Systems and Computer Systems and a Bachelor’s degree in Electronics, both from Pierre and Marie Curie University.
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NanoXplore SAS
NanoXplore is a privately owned fabless company based in France. The company was created in 2010 by three veterans of semiconductor industry with long experience in the design, test and debugging of FPGA cores. NanoXplore is therefore a leader in the design of large scale programmable logic arrays for state of the art FPGA cores. NanoXplore offers a familly of ITAR free rad-hard FPGA in 65nm for high reliable applications.