Fabian Goltzman

FPGA Design Engineer at NeuroBlade

Fabian Goltzman has a diverse work experience in the field of engineering. Fabian started their career as a student at Tel Aviv University from March 2012 to September 2016. Following that, they joined Intel Corporation as an ASIC Physical Design Engineer from October 2016 to March 2020. Their responsibilities included the design and implementation of ASIC physical properties. Fabian then transitioned to NeuroBlade in 2020, where they held the position of ASIC Physical Design Engineer. Fabian was responsible for block-level logic design implementation on FPGA devices, managing the entire design process from planning to synthesis, place, and route. The specific end date for their role at NeuroBlade is not provided in the given information.

Fabian Goltzman holds a Bachelor's degree from Tel Aviv University. The duration and field of study for this degree are not specified.

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Timeline

  • FPGA Design Engineer

    October 1, 2022 - present

  • ASIC Physical Design Engineer

    March, 2020