Richard Lin

Senior Digital ASIC Design Engineer at Neuron IP

Richard Lin is a Senior Digital ASIC Design Engineer with experience in high-speed SerDes design and development, contributing to various projects in advanced technologies and protocols. Richard has a background in electrical engineering with a focus on FPGA/ASIC design and has been involved in research and development work in various companies and academic institutions. Richard is passionate about extending science literacy and has volunteered their technical skills for charity work.

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Previous companies

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Timeline

  • Senior Digital ASIC Design Engineer

    July, 2022 - present