Cosimo Genoese

Cosimo Genoese is an experienced engineering professional with a solid background in FPGA and ASIC verification. With a degree in Telecommunications Engineering from Università di Bologna, Cosimo has held various engineering roles at notable companies including Kohlertech SA as an FPGA Engineer, X5T srl as an FPGA Engineer, and SIAE MICROELETTRONICA as a Verification Engineer from June 2018 to October 2020. Currently, Cosimo serves as an ASIC Verification Engineer at Nokia since October 2020, having previously worked at Altran Italia S.p.A. during a brief tenure in early 2016. This diverse experience in digital verification and FPGA design reflects a strong proficiency in both ASIC and FPGA engineering.