Yariv Mishlovsky

Yariv Mishlovsky is an experienced engineering project manager with a diverse background in VLSI design and project management. Currently serving as an Engineering Project Manager at Nuvoton Technology Israel Ltd since August 2023, Yariv previously held the position of VLSI Chip Lead/Project Manager at Valens Semiconductor, where responsibilities included leading the VA6003 chip development for high-speed data transport. With over a decade at DSP Group, Yariv progressed from Senior Chip Design Engineer to FE-Design Group Manager, overseeing a team of 15 engineers and managing chip design methodologies. Yariv's career includes significant roles at Infineon, Freescale Semiconductor, and Motorola Semiconductor, focusing on logic design, silicon validation, and block-level verification. Yariv holds a degree from Ben-Gurion University of the Negev.