Dhanyaa Sudarsan is a Senior Design Verification Engineer at NVIDIA since August 2020, focusing on fullchip ASIC verification, verification infrastructure development, and EDA tool bringup. Prior experience includes a Hardware Acceleration Intern role at AMD from May 2018 to August 2019, and a Design Verification Intern position at Aquantia in 2017, where responsibilities included identifying RTL bugs, developing runtime control support, and optimizing regression scripts. Dhanyaa also worked as a Research Intern at the University of Toronto Institute of Aerospace Studies in 2016, developing a web application for communication with an autonomous robot. Educational background includes a Bachelor of Applied Science and Engineering in Electrical and Computer Engineering from the University of Toronto (2015-2020) and a High School Diploma from John Fraser Secondary School (2011-2015).
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