Sapna Sharma

Sapna Sharma is a Lead Analog Design Engineer at NXP Semiconductors, with a professional background that includes roles as a Senior Analog Design Engineer and Analog Design Engineer since July 2019, as well as a Student Technical Intern. Prior experience includes internships at Delhi Metro Rail Corporation Ltd, focusing on metro technology, and Engineers India Limited, studying fibre optics applications in communication. Additionally, a trainee position at HP Education Services involved training on Embedded Systems. Academic qualifications include a Master of Technology in VLSI from Indraprastha Institute of Information Technology, Delhi, and a Bachelor of Technology in Electronics and Communications Engineering from Maharaja Surajmal Institute of Technology. Early education was completed at D.A.V Public School, covering both intermediate science and matriculation levels.