Ranganayakulu Guptha Kanumarlapudi

Ranganayakulu Guptha Kanumarlapudi is an experienced ASIC Design Engineer currently at Open-Silicon since August 2012, specializing in physical design and verification. Prior to this role, Ranganayakulu completed an internship with Intel GAR in 2012, focusing on block level physical design simulations for timing convergence. Ranganayakulu holds a Master of Technology (M.Tech.) degree in VLSI Design from Vellore Institute of Technology, completed between 2010 and 2012.