Vissu K is an experienced ASIC Verification Engineer currently working at PerfectVIPs since May 2013. Prior to this role, Vissu completed a course as a Design and Verification Engineer at Maven Silicon from November 2012 to February 2013. Vissu's academic background includes a Master of Technology (M.Tech.) in VLSI Design from GITAM Institute of Technology, obtained between 2010 and 2012, and a Bachelor of Technology (BTech) in Electronics and Communication Engineering from Swarnandhra College of Engineering and Technology, completed from 2005 to 2009.
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