Kedar Patel

Kedar Patel has a diverse work experience in the field of product engineering. Kedar currently holds the position of Staff Product Engineer at Power Integrations since November 2019. Prior to this, they worked at Navitas Semiconductor as a Staff Product Engineer from April 2017 to November 2019. At Navitas Semiconductor, their role involved creating characterization boards for the world's first All-GaN Half-Bridge Integrated Circuit and debugging foundry related and product functionality issues. Kedar also contributed to the creation and improvement of DRC rules to address these issues.

Before joining Navitas Semiconductor, Kedar worked at ON Semiconductor from June 2011 to April 2017. Initially, they served as a Product Evaluation Engineer - Intern from June 2011 to December 2011 and later advanced to the role of Senior Product Evaluation Engineer from January 2012.

Kedar's earliest work experience was as an R&D Engineer at BatchTest Systems for a brief period from June 2010 to August 2010.

Overall, Kedar Patel has gained comprehensive expertise in product engineering through their progressive roles in various semiconductor companies.

Kedar Patel completed a Bachelor of Technology degree in Electronics and Communication Engineering from the Institute of Technology, Nirma University, between the years 2005 and 2009. Following that, they pursued a Master of Science degree in Electrical Engineering from San Jose State University, which they completed from 2009 to 2011.