Dhanush M

Dhanush M is an experienced engineering professional with a focus on CPU validation and computer architecture. Currently serving as an Engineering Trainee at Proxelera since February 2022, Dhanush is skilled in HDL languages such as Verilog, SystemVerilog, and UVM. Prior to this role, Dhanush completed an internship at RV-VLSI VLSI and Embedded Systems Design Center, where a certification in RTL verification was obtained. Dhanush holds a Master of Technology in VLSI and Embedded Systems from Sri Siddharatha Academy of Higher Education and a Bachelor of Engineering in Telecommunications Engineering from Sri Siddhartha Institute of Technology.