Ayushi Pandey

Ayushi Pandey is a FPGA Engineer at QNu Labs, a position they have held since 2022. Prior to that, they held the role of Vice Chair at IEEE SRMCEM Student Branch, a position they held since 2021.

Ayushi Pandey has a Bachelor of Technology in Electronics and Communication Engineering from SHRI RAMSWAROOP MEMORIAL COLLEGE OF ENGINEERING AND MANAGEMENT, LUCKNOW, which they obtained between 2018 and 2022. Prior to that, they obtained their Intermediate from Central Board of Secondary Education between 2017 and 2018. Ayushi also obtained their High School from St. Fidelis College, Lucknow between 2015 and 2016. Additionally, Ayushi has a certification in Hardware Description Languages for FPGA Design from Coursera, which they obtained in September 2021.