Srinath Rajaram

Srinath Rajaram, Ph.D., is a highly skilled engineer with extensive experience in failure analysis and non-volatile memory technologies. Currently serving as a Staff Failure Analysis Engineer at Qorvo, Inc., since June 2021, Srinath previously worked as a Failure Analysis Engineer at ON Semiconductor and as a Yield Enhancement FA Engineer at Micron Technology. Srinath's academic background includes a Doctor of Philosophy from the University of South Florida, where research focused on spin-transport and micromagnetic calculations for memory technologies. Academic roles included Graduate Research Assistant and Graduate Teaching Assistant, facilitating student training in VLSI design. Earlier experience includes an Intellectual Property Intern role at USF Research & Innovation and a Systems Engineer position at Tata Consultancy Services.