Hafizuddin Syed is a Sr Lead Engineer specializing in Design Verification with extensive experience in IP, SubSystem, and SoC Verification. They have worked with major companies such as Qualcomm, Samsung Electronics, and HCL Technologies, developing expertise in AMBA protocols, low power simulations, and System Verilog-based functional verification. Hafizuddin is currently pursuing a Bachelor's Degree in Electronics and Communication Engineering at Amrita School of Engineering.
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