Jiaji Q.

Jiaji Q. is a Senior Digital Design Engineer at Qualcomm, where they plan and design mixed-signal IPs and conduct digital component evaluations. Previously, they worked as a Staff I Digital Design Engineer at an IoT startup, and as a Digital Design Engineer at Dialog Semiconductor, focusing on optimized digital block designs and collaboration across engineering teams. Jiaji began their career as a Hardware Validation Engineer at Supermicro and completed a SerDes System Verification internship at Broadcom. They hold a Master's degree in Electrical and Electronics Engineering from the University of California, Los Angeles, along with two Bachelor's degrees in Electrical Engineering and Electrical & Electronic Engineering from the University of Minnesota-Twin Cities and Nanyang Technological University, respectively.