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Utkarsh Kedia

Senior RTL Design Engineer

Utkarsh Kedia is a Senior RTL Design Engineer at Qualcomm, where they are responsible for changes to the RTL design of the DDRSS memory subsystem in SoCs. Prior to this role, Utkarsh interned at NVIDIA, focusing on power validation for GPUs and developing tools to enhance the validation process. In 2018, they completed a summer internship at the Indira Gandhi Centre for Atomic Research, working on compositional analysis of iron phosphate glasses. Utkarsh holds both a Master of Science in Physics and a Bachelor of Engineering in Electronics and Instrumentation from the Birla Institute of Technology and Science, Pilani.

Location

Rajasthan, India

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