Rayeni Saiteja

Rayeni Saiteja is a Senior ASIC Design Verification Engineer at Quest Global, specializing in SOC, IP, and subsystem verification through SystemVerilog and UVM methodologies. With experience at notable companies like Maven Silicon, Capgemini Engineering, and Quest Global, Rayeni has worked on complex projects for clients such as SpaceX, Intel, and BEL, focusing on advanced verification techniques. Rayeni earned a Bachelor of Technology in Electronics and Communications Engineering and a Master of Technology in VLSI System Design, demonstrating a strong foundation in technical education and a commitment to continuous improvement in the technology field.