David Roclin

David Roclin's work experience includes the following:

1. Principal Engineer Logic Design at Rambus from August 2021 to present.

2. Design Engineer at PLDA from April 2015 to August 2021. In this role, they were responsible for product ownership of various projects, including PCIe to AXI bridges, multi-channel DMA, and improvement of PCIe core. David also worked on FPGA hardware validation.

3. PhD at CEA from October 2011 to October 2014. David'sresearch focused on the integration of memory nano-devices in image sensor processing architecture, specifically in relation to Spiking Neural Network architecture and the implementation of synapses with emerging nano-scale memories.

4. Researcher at the University of Arkansas. David worked as a researcher in the Trustable Logic Circuit Design Lab. This included projects such as layout of threshold gates using Cadence tools and optimizing transistor sizing for various design constraints as part of their Master's thesis.

Overall, David Roclin has a strong background in logic design, product ownership, and research in the field of memory nano-devices and image sensor processing architecture.

David Roclin completed their Master's degree in Computer Engineering from the University of Arkansas from 2009 to 2010. Prior to that, they pursued a Master's degree in Real Time Systems Architectures from Le Mans Université from 2007 to 2009.