Sangeevan Nagaratnam

Senior Engineering Manager at RYSE

Sangeevan Nagaratnam has been working in the technology industry since 2010. Sangeevan started their career at Magnum Semiconductor as an ASIC Verification Engineer, where they designed an OTP desktop programmer using Verilog and RS232 protocol. In 2012, they moved to AMD as a Product Development Engineer and Failure Analysis Engineer, where they investigated customer-related issues with AMD chipset and GPU products and implemented a streamlined procedure to reduce preliminary processing time by 60%. Later that year, they also worked as a High School Tutor at Oxford Learning Centres Inc. In 2013, they joined MMB Networks as a Hardware Designer, where they designed PCBs for custom and existing ZigBee smart energy applications and conducted preliminary OTA and board level testing for FCC and IC compliance in ZigBee and WiFi bands. In 2017, they worked as a Hardware Designer at Terrative Digital Solutions. Since 2018, they have been working at RYSE as a Technical Project Manager, Lead Test Engineer, and Testing Engineer.

Sangeevan Nagaratnam earned a Bachelor of Applied Science (BASc) in Electrical Engineering from the University of Toronto in 2012. Sangeevan also holds a certification in Verigy 93K Training from Agilent Technologies.

Links

Previous companies

MMB Networks logo
AMD logo

Timeline

  • Senior Engineering Manager

    August 1, 2023 - present

  • Technical Project Manager

    December, 2021

  • Testing Engineer

    August, 2018