Eric Charlet

Eric Charlet has a diverse work experience spanning over two decades in the semiconductor industry. Eric started their career as a Trainee at Philips Composants et Semiconducteurs, where they conducted a comparative study of a mixer-oscillator function in different technologies. Eric then joined Synopsys Inc as a Standard Cells Library Design Engineer, responsible for ensuring the quality of standard cells libraries.

After that, Eric worked at Philips Composant et Semiconducteurs (later merged with NXP Semiconductors) as an IC Designer and Physical Design Engineer. Eric was involved in the backend design of the Aspic32 IC, focusing on place and route, power planning, timing optimization, routing, and static timing analysis.

Eric then joined Cadence Design System as a Clock Tree Synthesis Tool Product Engineer, where they were responsible for specifying and supporting clock tree synthesis tools.

Eric later joined Texas Instruments as a System Engineer, working on timing system specifications and high-speed digital interfaces. Eric also served as a SoC STA Engineer, performing static timing analysis and balancing clock trees.

Eric then worked at NXP Semiconductors as an IC Designer and Physical Design Engineer, focusing on ECO backend flow and STA analysis.

At STMicroelectronics, Eric held various roles, including Executive MBA Student, CPU/GPU Hardening Team IP Designer, and LPDDR PHY IP Designer. Their responsibilities involved RTL design, clock domain crossing checks, physical design, low power place and route, and timing closure.

Before their current role, Eric worked as an Independent Contractor at Portageo, l'Entreprise de Portage Salarial, and as a Physical Design Engineer at SCALINX.

Overall, Eric Charlet has a strong background in physical design, static timing analysis, and backend flow in the semiconductor industry.

Eric Charlet is currently pursuing a Master of Science (MS) degree in cybersecurity at Munster Technological University, starting in 2022. Prior to this, they obtained an MBA in Project Management from SKEMA Business School, where they studied from 2017 to 2019. In 1996, Eric completed a one-year additional degree (French Mastère) in MEMS Integration at ESIEE PARIS. Eric also holds a Master of Engineering (MEng) degree in Electrical Engineering with a focus on Very Large Scale Integration, which they earned from ENSEEIHT between 1992 and 1994.

In addition to their formal education, Eric has obtained certifications in various areas. In December 2019, they completed the "Intro to Python" course at Cybrary. In July 2017, they obtained a certification in "Web Application Penetration Testing" from the same institution. Additionally, in May 2017, Eric acquired certifications in both "Advanced Penetration Testing" and "Metasploit" from Cybrary.