Avinash Pisal is an FPGA Design Engineer with extensive experience in various engineering roles. They served as Project Lead at Mobiveil Inc. from 2017 to 2018, followed by a position as Senior Validation Engineer at Microsemi Corporation from 2018 to 2019. Avinash currently holds the title of Senior Staff Engineer at Seagate Technology in 2024 and has previously been a Staff Engineer. Their career began as a VLSI Design Engineer at Innovation Communications Systems LTD from 2011 to 2013, followed by a Senior Engineer and Technical Lead in Hardware/FPGA at Agiliad from 2013 to 2016. Avinash is also pursuing an Advanced Certification Programme in Space Technologies at the Indian Institute of Science (IISc), expected to conclude in 2025.
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