Zeeshan Rafique

Design Verification Engineer at Semidynamics Technology Services

Zeeshan Rafique is a skilled design verification engineer currently working at Semidynamics since December 2023. Prior experience includes roles at Micro Electronics Research Lab as a research assistant and graduate research associate, where notable contributions involved tapeout of Azadi-SoC on SKY130nm PDK with Google-sponsored Open-MPW shuttle submissions. At Xcelerium, Zeeshan worked as a digital design engineer, focusing on vectorizing a floating point unit for a RISC-V vector SoC and conducting simulation and emulation using AWS-FPGA. Contributions to the Google Summer of Code program included designing an integer Multiplication and Division Unit for the RISC-V core "SERV." Educational qualifications include a degree in Electrical Engineering specializing in Computer Systems from Usman Institute of Technology.

Location

Barcelona, Spain

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Semidynamics Technology Services

Semidynamics is a bandwidth core with vector units targeted at machine learning and artificial intelligence applications. They provide services in design, verification, FPGA acceleration, architecture, and performance analysis.


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Headquarters

Barcelona, Spain

Employees

11-50

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