Sarat Dasika is an experienced Senior Characterization Engineer at Semtech since April 2020, specializing in developing and optimizing characterization test plans for the PAM4 interface at high data rates, ensuring reliability across various operating conditions. Prior to Semtech, Sarat worked as a Senior Hardware Design Validation Engineer at Qualcomm from June 2016 to March 2020, where characterization plans were developed and executed for various interfaces of the Snapdragon mobile processor. From September 2012 to May 2016, Sarat served as a Hardware Test/Validation Engineer at Optellent Inc., focusing on firmware design for BERT modules and developing device drivers and GUIs. Sarat holds a Master of Science in Electrical and Electronics Engineering from San José State University and a Bachelor of Technology in Electronics and Instrumentation Engineering from Jawaharlal Nehru Technological University.
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