Roman Schilter

Roman Schilter has a diverse work experience spanning multiple roles and companies. Roman started their career at Conexant in 2004 as a Systems Engineer and worked there until 2005. Roman then joined LitePoint as a Senior DSP/Wireless Systems Engineer and later became a Technical Lead/Senior Member of Technical Staff. Roman worked at LitePoint from 2005 to 2016. In 2016, they joined Sensirion where they initially worked as an IC Verification Engineer. Later, they transitioned into the role of R&D Engineer and eventually became a Senior R&D Engineer.

Roman Schilter attended ETH Zürich from 1998 to 2003. No specific degree or field of study information is provided. Additionally, there is a mention of "Feld" but no dates or details associated with it.