Tolga Aras is a graduate student from ETH Zurich with a Master of Science in Electrical Engineering and Information Technology, currently writing a master thesis focused on designing a 5G URLLC digital baseband receiver. They have held positions such as Deputy Managing Director, where they developed independent and customer-oriented working skills, and as a Network & Systems Engineer intern, enhancing their project management expertise. Tolga's experience also includes a role as a Development Engineer specializing in FPGA and device driver development. They are now a Senior RTL Design Engineer at Sequans Communications, committed to creating innovative solutions in telecommunications.
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