Himakar M. has a background in Electronics and Communications Engineering, holding a Bachelor of Technology degree from the National Institute of Technology, Andhra Pradesh, completed in 2019. Currently employed at UST since June 2021, Himakar M. has progressed through roles including Associate Engineer - A3, Associate Engineer, and Associate Engineering Designer. Prior to UST, Himakar M. worked at Maven Silicon from October 2020 to June 2021 as an RTL Design and Verification Trainee. Experience includes a summer internship at the National Institute of Technology Warangal in May 2017, focusing on the verification of functionality for various logic circuits implemented in VHDL.
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