Srikanth Nethula currently serves as a Lead Engineer at SeviTech Systems Pvt. Ltd., focusing on VLSI ASIC design verification since December 2016. Additionally, Srikanth has been with Soctronics since September 2011, holding the position of Sr. ASIC Design and Verification Engineer and working on various projects, including HDMI TX Physical Layer verification and Serdes Testchip verification. Prior experience includes working as an ASIC Engineer with responsibilities in verifying SATA and FIREWALK IPs using SystemVerilog UVM methodology. Srikanth began a career in VLSI Logic Design as a trainee at Veda IIT in 2011 after earning a B.Tech in Electronics and Communication Engineering from Jawaharlal Nehru Technological University in 2008.
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