Tarun Agarwal

Tarun Agarwal is a highly skilled Staff Formal Verification Engineer at SiFive since March 2022, specializing in RISC-V CPU Formal Verification and FUSA IP Verification. Prior experience includes serving as a Senior Formal Verification Engineer at Qualcomm from February 2020 to April 2022, where responsibilities involved independently verifying critical blocks and analyzing corner cases. Tarun also worked at Oski Technology as a Formal Verification Engineer from October 2017 to January 2020, focusing on formal verification sign-off for cache and custom logic designs. Earlier, Tarun contributed to the development of the RocQ analytics SDK at rocQ Analytics in early 2016. An alumnus of the Indian Institute of Information Technology Allahabad, Tarun holds a Bachelor's Degree in Electronics and Communications Engineering, and completed high school at St. Pauls School in Gwalior.