AP

Anant Patel

Senior Manager Q&r, And Principal Reliability Engineer at Silanna Semiconductor

Anant Patel is an experienced professional in reliability engineering, currently serving as Senior Manager Q&R and Principal Reliability Engineer at Silanna Semiconductor since June 2019. Prior roles include Principal Reliability Engineer and Senior Staff Reliability Engineer at Silanna Semiconductor, Staff Reliability Engineer at pSemi, A Murata Company from September 2015 to June 2019, Senior Reliability Engineer at Qualcomm from July 2013 to September 2015, and Staff-II Product Engineer at Broadcom from March 2007 to July 2013. Anant Patel also gained early experience as a Research Assistant at the Indian Institute of Technology, Bombay in 2005.

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San Diego, United States

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