Sen-Wen Hsiao

Sen-Wen Hsiao is an experienced Analog Design Manager at Silicon Creations since September 2011, focusing on the development of SerDes and PLL projects for wireline applications, leading transmitter design for multi-standard SerDes, and assisting customers with system integration. Prior roles include Senior Design Engineer, where responsibilities encompassed high-speed IO circuit design, SerDes and frequency synthesizer implementation, and mixed-signal circuit design and verification, as well as an internship specializing in mixed-signal circuit design. Earlier experience at Samsung Electro-Machanics involved RF frequency synthesizer design and wireless transceiver architecture. Sen-Wen Hsiao holds a PhD and an MS in Electrical and Computer Engineering from the Georgia Institute of Technology and a BS in Electrical Engineering from National Taiwan University.