Silicon Labs
Apurva Sen is a Senior Validation Engineering Manager at Silicon Labs since January 2021, bringing extensive experience in technical architecture from roles at SAExploration, Wireless Seismic, Inc., and Mavenir. Previously, Apurva served as a Senior Staff Engineer at ST Microelectronics and as a Principal Engineer at Honeywell. Academic credentials include an MS in Embedded Systems from the Birla Institute of Technology and Science, Pilani, a PG Diploma in VLSI from C-DAC, Hyderabad, and a B.Tech in Instrumentation and Electronics from V.B.S Purvanchal University.
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