Casey Weltzin

Casey Weltzin is a Staff Design Engineer specializing in Digital Modem and DSP at Silicon Labs since July 2018, focusing on the design and verification of low-power wireless modem IP for IoT SoCs. In a prior role as PHY/MAC Validation Lead at Silicon Labs, Casey led a team to validate modem IP and optimize PHY configurations for various wireless applications, including Wi-SUN and Zigbee technologies. Before joining Silicon Labs, Casey held multiple positions at National Instruments from January 2007 to July 2018, including Senior Analog Design Engineer, where responsibilities encompassed designing analog circuitry and managing DC/DC power supply and RF signal chains. Additional roles included leading product marketing teams and managing a large group of Applications Engineers. Casey holds a Bachelor of Science in Electrical Engineering from the University of Wisconsin-Madison.