Euisoo Yoo

Euisoo Yoo is a seasoned professional in the field of electrical engineering with extensive experience in RFIC design and analog circuit development. Euisoo has held several key positions, including Senior RFIC Design Engineering Manager and RFIC Design Engineering Manager at Silicon Labs, as well as Senior RF & Analog Designer and RF & Analog Designer at Energy Micro AS. Prior experience includes roles as a Project Electrical Engineer at Lutron Electronics and Circuit Design Intern at IBM / ASIC North, along with a QA engineering internship at Radialpoint. Euisoo holds a Master of Science in Electrical Engineering from McGill University, earned in 2009, and a Bachelor of Engineering in Electrical Engineering from McGill University, completed in 2006.