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RTL Design
58 people · 0 jobs
This department focuses on the design and verification of RTL (Register Transfer Level) implementations for integrated circuits.
SANTHOSHI SEKAR
ASIC RTL DESIGN ENGINEER
Rishee kumar G
RTL Design Engineer
Bala krishna Prakash M
Sivaramapandian P
AKSHAY R
Dhinesh Krishnan
ASIC RTL Design Engineer
Meena Raghuraman
RTL Designer
Sibiya M
Visvaja K
Shrinithi R
ASIC RTL Verification Engineer
Manojkumar M
Kesavan Rangaraj
Praveen Gajje
RTL design engineer
Adithya Panchavati
Bala Prasanth
Siva Shankar S
Jananae Mohan
ASIC Design Engineer
Sneka T
Suriyamuthupandi M
Kanimozhi Marikani
FASIL MOHAMED
Gowtham Vignesh M M
Brindhadevi Baskaran
RTL Design and verification Engineer
Mathumitha Periasamy
SRAVANTHI PODETI
Manju Yuvaraj
MUTHYALA BHANU PRAKASH
VEGNESHRRAJ G
Vijayarammsen Annamalai
Kavipriya V
Vishali Sattanathan
Harivignesh A
Priyadharshini P
Saravanakumar VR
RTL Design Verification Engineer Trainee
Dharani M
Sridevi S
Ananthi Sivakumar
Lavanya Chandrasekar
Medhuna Seenivasan
Gousika M
Syam Murali Bondalapati
Akshaya Suresh
RTL DESIGN ENGINEER
CHANDRAN M
Rajeswaran U
VIJAYA BALA V
Gowtham K
Naga Saravanan N
Natesh Krishnan
Dhabasvini Thamotharan
Vignesh Sudhagaran
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