Bhushan Ghawat

Bhushan Ghawat is a skilled professional with extensive experience in design verification engineering. Currently serving as a Member of Technical Staff at SmartSoC Solutions Pvt Ltd since February 2023, Bhushan has contributed to the CEVA-XC6 Baseband Processor DMSS Subsystem Verification project for CEVA DSP, Israel. Previously, Bhushan held the position of Senior Design Verification Engineer at Synapse Design Inc., collaborating with Marvell Technology on PUF Verification. Additional experience includes a role as Senior Design Verification Engineer at Agasthya App Labs, working with ENSILICA and Solomon Systech on projects Formosa & Capella, as well as a Verification Engineer position at Incise Infotech, where Bhushan contributed to projects for Analog Devices and Intel. Bhushan holds a Bachelor of Engineering in Electronics and Communication Engineering from Sanghvi Innovative Academy and completed secondary education at Indira Vidya Mandir.