Jayanth R Kashyap

VLSI Design Verification Engineer at SmartSoC Solutions Pvt Ltd

Jayanth R Kashyap is a VLSI Design Verification Engineer at SmartSoC Solutions Pvt Ltd since July 2022, bringing valuable expertise in the field. Prior to this role, Jayanth completed an internship at Schneider Electric in May 2019. Jayanth holds a Master of Engineering degree in VLSI and Nanotechnology from M. S. Ramaiah University of Applied Sciences, where education was undertaken from November 2020 to July 2022.

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