Tharun Deep

Tharun Deep is an experienced engineer with a strong background in physical design and timing analysis, currently serving as an STA Engineer at NXP Semiconductors since July 2021. Tharun has also worked as an Engineer - 2 at Qualcomm from June 2019, focusing on multi-voltage blocks and timing closure. Experience includes a role as a Senior Physical Design Engineer at SmartSoC Solutions Pvt Ltd and a Design Engineer position at ALTEN Calsoft Labs. Earlier positions include contributions at Qualcomm as an Engineer - 1, as well as an Engineering Trainee at RV-VLSI, where Tharun implemented physical design for the Torpedo subsystem. Tharun began a career in design engineering at Symbolein Technologies after earning a Master’s degree in VLSI and Embedded Systems from Reva Institute and a Bachelor’s degree in Electronics and Communications Engineering from Sai Vidya Institute of Technology.