Cory Li

Cory Li is a Principal ASIC Design Engineer at SpaceX, with experience starting from January 2017. Prior to this role, Cory worked as an ASIC Design Engineer at Intel Corporation from April 2012 to January 2017, where responsibilities included defining microarchitecture, writing System Verilog code for cache systems, and analyzing timing reports. Earlier experience includes a Design Verification Internship at Broadcom, where verification of various SoCs was conducted, and a Digital Design Internship at Moog, focusing on the validation of aircraft control components. Cory began career in engineering as an Undergraduate Researcher at the Center for Embedded Network Sensing and also gained experience as a Web Developer Intern at QuinStreet. Cory holds a Master’s degree in Electrical and Computer Engineering from UC San Diego and a Bachelor’s degree in Electrical Engineering with Computer Engineering from UCLA.