Kartavya Jain is an accomplished RTL Designer and Staff Engineer with over 7 years of experience in the VLSI industry, specializing in SoC development encompassing RTL design, synthesis, and STA. Previously at NXP Semiconductors, Kartavya held various roles, including Senior Design Engineer and Lead Design Engineer, where they developed tools for RTL integration and verification. Currently, Kartavya works as a Staff Engineer at STMicroelectronics, focusing on MCU products and leading methodologies for frontend and middle tools. Kartavya holds a Bachelor of Technology degree in Electrical, Electronics, and Communications Engineering from Nirma University.
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