Prateek Ranjan is a seasoned engineer with extensive experience in physical verification and design engineering. Currently serving as a Technical Lead at STMicroelectronics since April 2022, Prateek previously worked as a Physical Verification Engineer at SeviTech Systems Pvt. Ltd. from November 2021 to March 2022. Prior to that role, Prateek was a Memory Layout Engineer (Contractor) at Synopsys Inc. from June 2018 to November 2021 and a Design Engineer at Masamb Electronics Systems from July 2016 to November 2021. Prateek also has experience as a Layout Design Engineer (Contractor) at TSMC for a brief period in early 2018. Prateek holds a Bachelor of Technology (B.Tech.) in Electronics and Communication from The ICFAI University, Dehradun, completed between 2012 and 2016, and attended Bishop Johnson School and College from 1995 to 2010.
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