Tri Bui Huu is an experienced Physical Design Manager at Synapse Design Inc. since February 2021, leading a team through the full SoC design flow, and ensuring technical expertise across various implementation tasks. Prior to this role, Tri served as a Staff Physical Design Engineer, managing critical projects involving advanced technologies like TSMC7FF and 28nm, with responsibilities including PnR flow management and physical implementation. Previous positions include Senior Physical Design Engineer roles at Synopsys Inc. and eSilicon, where Tri handled tasks from RTL to GDS for various IP designs and engaged in circuit design and verification for analog blocks. Tri holds a Bachelor's degree in Electronics from Danang University of Technology, awarded in 2013.
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