Jeevan S Gowda

Jeevan S Gowda is a seasoned engineer specializing in ASIC design verification with current employment at Synaptics Incorporated as a Senior Digital Engineer since January 2023. Prior to this role, Jeevan worked as a Senior Electronic Design Engineer at Western Digital from August 2021 to January 2023. Earlier experience includes serving as a Research Assistant at San Jose State University, where assistance was provided to a professor in semiconductor nanoelectronics research and TCAD analysis from February 2021 to August 2021. Jeevan's academic background includes a Master's degree in Electrical and Electronics Engineering from San José State University (2018-2020) and a Bachelor of Engineering in Electrical, Electronics and Communications Engineering from Visvesvaraya Technological University (2013-2017).