Ajay KS

Ajay KS is a Staff Engineer specializing in ASIC digital design at Synopsys Inc, with previous roles as a Senior FPGA Engineer at Lekha Wireless Solutions and a Member Technical at iWave Systems Technologies. They possess extensive experience in architecture development, digital signal processing, and the implementation of complex control and datapath designs using Verilog/VHDL. Ajay is knowledgeable in various protocols and design tools, complemented by a Bachelor of Engineering in Electronics and Communication from Sahyadri College of Engineering and Management. Committed to continuous learning and collaboration, they aim to leverage their skills in diverse team environments.