Synopsys
Ajish George is an accomplished engineer with extensive experience in the semiconductor industry. Currently serving as a SoC Engineer Staff (PD/STA) at Synopsys Inc since December 2020, Ajish has also held various roles at Wipro Technologies, including STA/Synthesis Lead and Design / Low-Power Engineer, from July 2014 to the present and March 2006 to June 2013, respectively. Previous experience includes a stint as a Design Engineer at Aspire Technologies Cochin from June 2005 to January 2006. Ajish holds a Master's degree in MicroElectronics from the Birla Institute of Technology and Science, Pilani, earned between 2010 and 2012.
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