Albert Le

Albert Le is a Manager of ASIC Design Verification at Synopsys Inc, where they contribute to the design and verification of advanced digital systems. They have previously engaged in various roles at Synopsys, including positions as a Verification Intern and ASIC Digital Design Engineer. Albert's earlier experience includes an apprenticeship at The HQ Systems Engineering Services, where they designed mechanical systems and drafted architectural plans, as well as a summer position at the Toronto Transit Commission, where they developed Excel VBA macros and drafted engineering drawings. Albert earned a Bachelor of Applied Science in Computer Engineering from the University of Toronto.