Alejandro Moreno is a Senior Staff Engineer at Synopsys Inc since February 2018, bringing extensive experience in hardware engineering and verification. Prior roles include VLSI Tech Lead - Verification at Wipro and Senior Hardware Verification Engineer at UST Global, where responsibilities involved hardware emulation for Intel. Alejandro has also contributed to academia as a part-time professor at various institutions, including CINVESTAV and Universidad Autónoma de Guadalajara, teaching courses on microcontroller architecture and digital circuit verification. Alejandro holds a Master's Degree in Electrical Engineering from CINVESTAV and has completed an advanced program in semiconductor technology development, complemented by a degree in Electronic and Digital Communication Systems Engineering from Universidad Autónoma de Aguascalientes.
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